Job Description:

The work aims to architect and develop the AI compiler for HiSilicon Neural Engine Accelerator architecture, to enable inference of deep learning networks onto this architecture with an emphasis on performance and power.

We are looking for experts who have background of AI compiler, such as compile optimization from operator end to Instruction layer, TVM framework, scheduling of expressions, analysis of dependency tree, instruction matching (e.g.: auto vectorize), polyhedral algorithm, Halide, operator optimization, quantization scheme, auto-optimization of heterogeneous compiler, etc.

Requirements:

1. Familiar with compiling principles and computer architecture, having at least two years of experience in compiler, high-performance library or AI framework development.
2. Familiar with or work experience in open-source software such as TVM, LLVM is preferred.
3. Familiarity with deep learning、machine learning and mainstream AI frameworks is preferred.
4. Programming experience with CUDA or OpenCL is preferred.
5. Having experience in design and development of hardware such as FPGA is preferred.